Method for manufacturing CMOS circuits

US7723175B2 · kind B2 · utility

Assignee

• UNIVERSITAT STUTTGART · DE

Inventors

• Norbert Fruehauf · Sindelfingen, DE
• Holger Baur · Durlangen, DE
• Efstathios Persidis · Stuttgart, DE
• Patrick Schalberger · Magstadt, DE

Key dates

• Filing date: Oct 4, 2006
• Grant date: May 25, 2010
• Expiry date: Jul 10, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

A method of manufacturing transistors of a first and second type on a substrate includes producing doped semiconductor areas with a first conductivity type in eventual contact areas of a first type of transistors, depositing a first intrinsic semiconductor layer over an entire surface, activating dopants in the semiconductor areas such that a contact area with the first conductivity type is produced in the intrinsic semiconductor layer, depositing a gate dielectric, producing a gate electrode by depositing a first conductive layer and patterning the first conductive layer, performing ion doping with dopants to produce contact areas with a second conductivity type for a second type of transistor, depositing a passivation layer, opening contact openings, and depositing and patterning a second conductive layer.