NAND flash memory device having a contact for controlling a well potential
US7723775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2008 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Dec 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
A NAND flash memory device includes a plurality of active regions extending in a first direction on a substrate, the active regions including a first well of a first conductivity, a plurality of word lines extending on the first well in a second direction perpendicular to the first direction, first and second dummy word lines extending in a second direction on the first well, the first and second dummy word lines being separated from each other to define an intermediate region therebetween, the first and second dummy word lines being adapted to receive a substantially constant bias voltage of about 0 V, and at least one contact in an active region in the intermediate region between the first and second dummy word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.