Semiconductor chip with a number of A/D converters that include a group of redundant A/D converters
US7724169B2 · kind B2 · utility
1Cited by
14References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 12, 2008 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Feb 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The manufacturing yield of an A/D converter semiconductor chip is significantly increased by utilizing a number of A/D converter circuits that include a group of redundant A/D converter circuits. As a result, the semiconductor chip can be wired to form a “good” A/D converter semiconductor chip as long as the number of “bad” A/D converter circuits does not exceed the number of redundant A/D converter circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.