System and method for designing and implementing packet processing products
US7724684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2007 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Apr 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3009
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method for allowing a user to create instructions for building a packet processing integrated circuit. The system includes a user interface for allowing a user to define a desired packet processing algorithm (4) using a plurality of discrete packet processing blocks (22, 24, 28, 30), each of the blocks corresponding to a portion of the desired packet processing algorithm (4). The system allows the user to define connections (10) between the plurality of packet processing blocks (22, 24, 28, 30). The system processes a plurality of packet processing blocks (22, 24, 28, 30) and the connections to provide a list of instructions in a hardware description language for producing an integrated circuit capable of executing the desired packet processing algorithm (19). The list of instructions can be delivered to a customer (12), or the customer can receive an integrated circuit constructed using the list of instructions (19), or the customer can receive a NETLIST generated using said list of instructions (16). The plurality of packet processing blocks (22, 24, 28, 30) can include a Packet Processing Unit (PPU, PPUX) 22, a Packet Modification Unit (PMU) 28, and a Decision and F…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.