Programmable logic device programming verification systems and methods
US7725803B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Mar 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/09
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with an embodiment of the present invention, a programmable logic device includes configuration memory to store configuration data to configure the programmable logic device, and a non-volatile memory to store configuration data for transfer to the configuration memory to configure the programmable logic device. The non-volatile memory also stores a first code value based on the configuration data stored in the non-volatile memory. A code block calculates a second code value based on the configuration data transferred to the configuration memory. A comparator compares the first code value to the second code value to verify that the configuration data was not corrupted during the transfer from the non-volatile memory to the configuration memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.