Method and circuit for implementing eFuse sense amplifier verification
US7725844B2 · kind B2 · utility
5Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2008 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Nov 13, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit for implementing Efuse sense amplifier verification, and a design structure on which the subject circuit resides are provided. A first predefined resistor value is sensed relative to a reference resistor. A second predefined resistor value is sensed relative to a reference resistor. Responsive to identifying a respective sense amplifier output resulting from the sensing steps of an unblown eFuse and a blown eFuse, valid operation of the sense amplifier is identified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.