Patent · US Active

Verification system and method

US7730325B2 · kind B2 · utility

25Cited by
14References
114Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 30, 2004
Grant dateJun 1, 2010
Priority date
Expiry dateJun 28, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/4402
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A verification system has an operational component registry 10 that includes an interface 20, a memory device 30, and a processor 40. Preferably, the interface 20 in the operational component registry 10 communicates the installed identification data 50 from the gaming units 60 to the operational component registry. The memory device 30 preferably stores registered identification data 70 for the gaming units 60. Preferably, the processor 40 in the operational component registry 10 then analyzes the registered identification data 70 and the installed identification data 50 from the gaming units 60, after which enablement of the gaming units is determined based upon the examination of the registered identification data and the installed identification data. An operational component registry 10 may also monitor changes, services, requirements, enablement, and productivity of the gaming units or components of the gaming units.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.