Active pixel image sensor with reduced readout delay
US7732748B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Jun 8, 2010 |
| Priority date | — |
| Expiry date | Oct 28, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods, devices, and systems for improving (i.e., reducing) the settling time of an output signal read from a photo sensor and improving the PSRR of the supply voltage are disclosed, wherein a detected charge in a pixel is converted to a voltage and drives a source follower transistor. A bias transistor is coupled in series with the source follower transistor and includes an output therebetween. The bias transistor is driven to source a reduced current when the voltage results from a readout of a reset value of the pixel and the bias transistor is driven to source an enhanced current when the voltage results from a readout of a sensed signal value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.