Configuring sets of processor cores for processing instructions
US7734895B1 · kind B1 · utility
101Cited by
15References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2006 |
| Grant date | Jun 8, 2010 |
| Priority date | — |
| Expiry date | Apr 6, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a plurality of processor core. Processing instructions in the integrated circuit includes: managing a plurality of sets of processor cores, each set including one or more processor cores assigned to a function associated with executing instructions; and reconfiguring the number of processor cores assigned to at least one of the sets during execution based on characteristics associated with executing the instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.