Patent · US Active

System and method for maintaining a constant processor service level in a computer

US7734952B1 · kind B1 · utility

5Cited by
4References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 27, 2004
Grant dateJun 8, 2010
Priority date
Expiry dateNov 5, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/2038
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system for maintaining the execution speed of a multiprocessor computer system includes automatically detecting a change in instruction execution rate in a disabled processor by a threshold amount and determining an amount of change in instruction execution rate to adjust an actual system-level instruction execution rate to approximate a target system-level instruction execution rate. The target system-level execution rate being pre-determined. Thereafter, the method adjusts one or more instruction processor execution rates such that the actual system-level instruction execution rate approximates the target system-level instruction execution rate to overcome the loss of the disabled processor. One embodiment of the invention involves the use of a processor key for licensing of processor resources within the computer system and offers the option of enabling a dynamic processor recovery method as well as an automatic execution rate regulation method.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.