Patent · US Active

System and method for implementing high-resolution delay

US7737671B2 · kind B2 · utility

3Cited by
11References
13Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 28, 2006
Grant dateJun 15, 2010
Priority date
Expiry dateMay 2, 2028

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A system and method is provided for providing a deadband switching time delay. One embodiment of the present invention includes a switching regulator system. The switching regulator system includes a control circuit configured to alternately activate a high-side power switch and a low-side power switch of the switching regulator system. The switching regulator system also includes a switching delay element configured to provide a switching deadband associated with a logic state transition delay of at least one of the high-side power switch and the low-side power switch, the delay element comprising a programmable coarse delay element to provide a course delay amount and a programmable fine delay element to provide a fine delay amount.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.