Method and apparatus for increasing load bandwidth
US7739483B2 · kind B2 · utility
2Cited by
4References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | May 24, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for dual-target register allocation is described, intended to enable the efficient mapping/renaming of registers associated with instructions within a pipelined microprocessor architecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.