Partial good schema for integrated circuits having parallel execution units
US7739637B2 · kind B2 · utility
2Cited by
20References
20Claims
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Key dates
| Filing date | Jan 30, 2009 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Jan 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Processing engines (PE's) disposed on the substrate. Each processing engine includes a measurement and storage unit, and a PE controller coupled to each of the processing engines. The processing engines perform self-tests and store the results of the self-tests in the measurement and storage unit. The PE controller reads the results and selects a sub-set of processing engines based on the results and an optimization algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.