Frequency multiplier
US7741885B1 · kind B1 · utility
7Cited by
13References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2009 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Mar 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4902
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device for modifying an input signal having an input signal frequency and a duty cycle is disclosed. The device determines two separate counts for each of the high and low pulses of the input signal. One of the two counts for each of the high and low pulses is divided. The divided count is then compared with the undivided count. Based on this comparison, an output module outputs an output signal that has the same duty cycle as the input signal but at a frequency that is a multiple of the input signal frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.