Charge pump circuit for high voltage generation
US7741898B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 23, 2007 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Dec 18, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/077
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit and method are given, to realize a high efficiency voltage multiplier for integrated circuits generating an internal and flexible positive or negative high voltage on-chip supply voltage from low external positive or negative supply voltages or ground. Applying multi-phase control signals to voltage boost internal nodes allows for eliminating threshold voltage drop losses and thus improves the voltage pumping gain compared to circuits with diode-configured FETs of prior art. Making use of voltage signals from antecedent stages in order to bias the bulk of MOS transistors fabricated in triple-well technology enables relaxing of the gate oxide stress within high order stage MOS transistors. Such a method, called leap-frog bulk potential tracking method, makes MOS transistors from different stages exhibit about the same body effect, which is very important because MOS transistors of higher order stages now show the same performance as MOS transistors from lower order stages. Important also in terms of efficiency as the charge sharing speed of high order MOS transistors always dominates the total charge pump performance and the driving force of pumped currents, thus also allo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.