Frequency modulation using a digital frequency locked loop
US7741928B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2008 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Dec 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03C3/095
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Circuits and methods for frequency modulation (FM) using a digital frequency-locked loop (DFLL). A digitally controlled oscillator (DCO) generates and adjusts a frequency of a modulated signal based on a digital tuning word. A DFLL control logic circuit receives a feedback of the modulated signal and generates a carrier signal word. A sigma delta modulator circuit receives an input signal and applies dithering to produce a dithered input signal word. An adder circuit receives and sums the dithered input signal word and the carrier signal word to produce the digital tuning word. The DFLL control logic circuit adjusts the carrier signal word to lock a carrier frequency of the modulated signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.