Securing an integrated circuit
US7742357B2 · kind B2 · utility
1Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 5, 2006 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Apr 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/1201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Securing an integrated circuit, including fabricating the integrated circuit to include a multiplicity of unblown efuses, at least one surrogate efuse that emulates a blown efuse, non-volatile data representing the blown state of the surrogate efuse, and security circuitry; and setting, by the security circuitry when power is first applied to the integrated circuit, a security state of the integrated circuit in dependence upon whether a sensed state of the surrogate efuse is equal to the blown state of the surrogate efuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.