Digital image data processing apparatus
US7742661B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2006 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Apr 22, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present image processing apparatus includes a pixel arrangement controller and two data unit buffers coupled with the pixel arrangement controller. This controller can rearrange the addresses of the pixels in the corresponding data unit buffer according to the size of the block. Accordingly, the pixel data of the same block can be arranged in sequential addresses of the data unit buffer. Therefore, the pixel data may be processed as a batch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.