Sequential circuit element including a single clocked transistor
US7746137B2 · kind B2 · utility
6Cited by
15References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2007 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Aug 28, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3869
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method is disclosed that includes propagating data via a first data path of a sequential circuit element in response to a clock signal received at a single clocked transistor of the sequential circuit element. The method also includes retaining information related to the data propagated via the first path at a retention circuit element of a second data path, where the first data path includes a first transistor that is responsive to an output of the single clocked transistor. The first transistor has a higher current flow capacity than a second transistor associated with the second data path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.