Phase-locked loop circuit and data reproduction apparatus
US7746180B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2009 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Jan 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0087
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.