Patent · US Active

Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise

US7746257B2 · kind B2 · utility

9Cited by

28References

20Claims

0Family size

Assignee

CIRRUS LOGIC, INC. · US

Inventors

Edmund M. Schneider · Austin, US
Eric J. Swanson · Kyle, US
John L. Melanson · Austin, US

Key dates

Filing date	Feb 5, 2009
Grant date	Jun 29, 2010
Priority date	—
Expiry date	Mar 2, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH03M3/456
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.