Range checking content addressable memory array
US7746679B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 3, 2008 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Dec 26, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A disclosed embodiment is a range checking CAM array comprising a plurality of words, where each of the plurality of words comprises a plurality of bound check cells. Each of the plurality of bound check cells outputs a corresponding plurality of match signals and a corresponding plurality of bound check signals. The corresponding plurality of match signals and corresponding plurality of bound check signals are combined to produce a range check output indicating whether data on a data input bus is within a target range. The plurality of bound check cells may be coupled to form at least one cascade of bound check cells, where each cascade of bound check cells may be terminated at a ripple logic. The CAM array produces a final range check output based on the corresponding plurality of match signals and the corresponding plurality of bound check signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.