Mechanism for modem pass-through with non-synchronized gateway clocks
US7746881B2 · kind B2 · utility
5Cited by
22References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2004 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Jan 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5671
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for compensating for asynchronous clock sources is presented. A buffer is provided for storing frames received from a packet network. The buffer having a preselected playout delay. Upon detecting a buffer overflow, a drain operation is performed on the buffer and the playout delay is modified to provide a sufficient number of buffer locations for frames to be stored. Upon detecting a buffer underflow, a fill operation is performed on the buffer and the playout delay is modified to provide a sufficient number of frames to be played out.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.