Low-power receiver decoding
US7747923B2 · kind B2 · utility
1Cited by
7References
28Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 26, 2004 |
| Grant date | Jun 29, 2010 |
| Priority date | — |
| Expiry date | Feb 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0057
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments of a method and apparatus for a transceiver decoding an Ethernet signal. The method includes receiving an Ethernet bit stream. The bit stream is at least one of low-complexity decoded by a low-complexity decoder of the transceiver or high-complexity decoded by a high-complexity decoder of the transceiver. If the bit stream fails a low-complexity decoding test, then the bit stream is high-complexity decoded. The low-complexity decoding and high complexity decoding are iteratively repeated until the bit stream passes the low-complexity decoding test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.