Anti-tamper electronic obscurity using E-fuse technology
US7755502B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2007 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Aug 19, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2123
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design structure embodied in a machine readable medium used in a design process includes a circuit that employs an anti-tamper sensor. The circuit employs an anti-tamper sensor that includes a circuit element that is responsive to a first input and to a second input. A selective coupling element couples the circuit element to the first input and is responsive to the anti-tamper sensor. The selective coupling element has a first state that allows the circuit element to operate normally when the anti-tamper sensor does not detect a tamper condition and is configured to enter a second state that causes the circuit element to become inoperable when the anti-tamper sensor detects a tamper condition. A decoy coupling element is disposed between the second input and the circuit element and has an appearance corresponding to the selective coupling element. The decoy coupling element will cause the circuit element not to operate normally if the decoy coupling element has a selected physical property of the selective coupling element in the first state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.