Imaging system with low noise pixel array column buffer
US7755689B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2007 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Jan 2, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An imaging system includes a row and column array of active pixels, each having an associated pitch. In response to respective control signals, each pixel outputs a reset level which includes noise components, or a signal level which includes signal and noise components. Multiple column buffers, each having a pitch equal to or less than that of a pixel, convey the outputs of respective pixel columns to a bus line. Each buffer comprises ‘odd’ and ‘even’ S&H/CDS circuits, which process the pixel outputs of odd and even rows, respectively. Each S&H/CDS circuit subtracts pixel reset level from signal level to produce an output in which correlated noise is suppressed. Each column buffer includes a buffer amplifier which conveys the output to the bus line. A gain amplifier separate from the column buffers is coupled to the bus line such that it amplifies the outputs of a multiple column buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.