Elimination of DC offset in analog baseband circuit with minimized transients
US7760824B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2007 |
| Grant date | Jul 20, 2010 |
| Priority date | — |
| Expiry date | Apr 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G1/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog baseband circuit includes first and second DC (direct current) offset cancellers and an offset canceller controller. The first DC offset canceller includes a first filter and a first PGA (programmable gain amplifier) with a first gain step for eliminating a first dc component from an input baseband signal. The second DC offset canceller includes a second filter and a second PGA with a second gain step less than the first gain step for eliminating a second dc component from an output of the first DC offset canceller. The offset canceller controller controls the first and second filters to operate in a fast mode when a gain of the first PGA is changed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.