Iterative filter circuit calibration
US7761067B1 · kind B1 · utility
23Cited by
41References
52Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2004 |
| Grant date | Jul 20, 2010 |
| Priority date | — |
| Expiry date | Dec 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/1638
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Apparatus, systems, and methods implementing techniques for calibrating a filter circuit. A comparator generates an output based on a filter output amplitude signal and a reference amplitude signal. A calibration logic unit receives the comparator output and produces a component code that is used by the filter circuit to adjust one or more component values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.