Semiconductor device and manufacturing method
US7763910B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2009 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Mar 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A semiconductor device has source and drain electrodes formed on a substrate, a gate insulation film formed on the substrate between the source and drain electrodes, and a gate electrode formed on the gate insulation film. These elements are all covered by a dielectric sub-insulation film. An opening is formed in the sub-insulation film, partially exposing the gate electrode. A field plate extends from the top of the gate electrode down one side of the gate electrode as far as the sub-insulation film covering the gate insulation film, filling the opening. The thickness of the sub-insulation film can be selected to optimize the separation between the field plate and the substrate for the purpose of reducing current collapse by reducing electric field concentration at the edge of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.