Semiconductor device
US7764564B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 30, 2007 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, which allows a bank interleaving operation by issuing a write command and a read command to different banks while switching them without a waiting time to thereby prevent a drop in data transfer efficiency, is provided. The semiconductor device includes: a memory chip with banks each including at least one memory cell; a logic chip; and data buses, provided corresponding to the banks, for transmitting/receiving write data and read data between the banks and the logic chip. The logic chip includes: a writing data bus for transmitting write data to the memory chip via a data bus; a reading data bus for receiving read data from the memory chip via a data bus; and a switch for, corresponding to a write command or a read command to a bank, connecting the writing data bus or the reading data bus to a data bus connected to the bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.