Synchronization of a digital circuit

US7764755B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventors

• Michael Brünnert · Munich, DE
• Paul Lindt · Donauwörth, DE

Key dates

• Filing date: Dec 22, 2006
• Grant date: Jul 27, 2010
• Expiry date: May 26, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L7/0008
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

A method of synchronization of a digital circuit includes selecting a first site and a second site from a plurality of different sites of the digital circuit where a signal to be synchronized occurs; passing a first signal, which is the signal to be synchronized of the first site, via a first line that starts at the first site, ends at the second site, and contacts each of the sites just once, to the second site; passing a second signal, which is the signal to be synchronized of the second site, via a second line that starts at the second site, ends at the first site, and contacts each of the sites just once, to the first site; determining, for each site, a first phase shift between the signal to be synchronized of this site and the first signal, and a second phase shift between the signal to be synchronized of this site and the second signal; and determining, from the first and second phase shifts of each site, a delay for each site, with which the signal to be synchronized of the respective site is delayed for the synchronization.