Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit
US7765074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2006 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Jun 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit, apparatus and method obtains system margin at the receive circuit using phase shifted data sampling clocks while allowing the CDR to remain synchronized with the incoming data stream in embodiments. In an embodiment, a circuit includes first and second samplers to sample a data signal and output data and edge information in response to a data clock signal and an edge clock signal. A phase detector generates phase information in response to the data information and the edge information. A clock phase adjustment circuit generates the data clock signal and the edge clock signal in response to the data information during a synchronization mode. The clock phase adjustment circuit increments a phase of the data clock signal during a waveform capture mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.