Viterbi decoder and viterbi decoding method
US7765459B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 28, 2006 |
| Grant date | Jul 27, 2010 |
| Priority date | — |
| Expiry date | Apr 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/41
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a Viterbi decoder and a Viterbi decoding method in a register exchange method. The Viterbi decoder receives an encoded bit sequence of a convolutional encoding method from a channel, generates an expanded encoded bit sequence by cyclically adding a part of the encoded bit sequence or the entire encoded bit sequence to the encoded bit sequence more than one time, performs a Viterbi decoding operation in a register exchange method, and generates decoded data. In addition, the Viterbi decoder selects an end bit sequence corresponding to the number of the unit of encoded bits among the decoded data, rearranges an order of the end bit sequence, and generates final decoded data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.