Method for manufacturing a structure in a semiconductor device and a structure in a semiconductor device
US7767571B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2006 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Oct 2, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention is concerned with a method for manufacturing a local wiring in a semiconductor device, comprising the manufacturing of at least two electrically conducting structures essentially in the same horizontal level in a layered stack on a substrate, the at least two electrically conducting structures being separated by a gap filled with at least one dielectric material, the gap being electrically bridged by conductive material, to form at least one contact element electrically connecting the at least two electrically conducting structures, whereby at least one contact element is produced in a single lithographic step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.