Metal etching method for an interconnect structure and metal interconnect structure obtained by such method
US7768129B2 · kind B2 · utility
0Cited by
13References
20Claims
0Family size
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Key dates
| Filing date | Feb 3, 2004 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Oct 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal interconnects structure, comprises a substrate (11), a dielectric layer (12) lying above the substrate, a stop layer (13) for metal etching lying above the dielectric layer, a metal layer (15′) lying above the stop layer, said metal layer being patterned according to a desired pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.