Base line control electronics architecture
US7768730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2008 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Feb 18, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A read channel in that reads data from a magnetic storage media. An analog signal produced by passing a read head over magnetic storage media is amplified to match the range of an analog to digital converter (ADC) range. A baseline adjustment is performed on the amplified analog signal to center the amplified analog signal to a midscale of the ADC, which may be based on an error feedback signal and/or a decision feedback signal. Read channel compensation may then be performed after the baseline adjustment has been applied. The read channel compensated analog signal is sampled with the ADC to produce a digital signal. This digital signal may be filtered and a bit sequence may then be detected from the filtered digital signal. The EFB signal and/or the DFB signal may be produced in the digital domain based on the digital signal and the detected bit sequences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.