Method and apparatus for evaluating integrated circuit design model performance using basic block vectors and fly-by vectors including microarchitecture dependent information
US7770140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2008 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Aug 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3428
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test system or simulator includes an IC test application sampling software program that executes test application software on a semiconductor die IC design model. The test application sampling software includes trace, simulation point, CPI error, clustering and other programs. IC designers utilize the test application sampling software to evaluate the performance characteristics of IC designs with test software applications. The test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software. The test application sampling software analyzes microarchitecture dependent information that it uses to generate the FBVs. Test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing an instruction budgeting method. Designers use the test system with test application sampling software to evaluate IC design models by using the representative test application software program.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.