Post-register allocation profile directed instruction scheduling
US7770161B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2005 |
| Grant date | Aug 3, 2010 |
| Priority date | — |
| Expiry date | Jun 2, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/445
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method, system, and computer usable program code for selective instruction scheduling. A determination is made whether a region of code exceeds a modification threshold after performing register allocation on the region of code. The region of code is marked as a modified region of code in response to the determination that the region of code exceeds the modification threshold. A determination is made whether the region of code exceeds an execution threshold in response to the determination that the region of code is marked as a modified region of code. Post-register allocation instruction scheduling is performed on the region of code in response to the determination that the region of code is marked as a modified region of code and the determination that the region of code exceeds the execution threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.