IC package having IC-to-PCB interconnects on the top and bottom of the package substrate
US7772696B2 · kind B2 · utility
12Cited by
1References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2007 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Apr 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package, according to one embodiment, includes a package substrate, an interface stratum and an integrated circuit die. Both the IC die and interface stratum are disposed on the package substrate. The integrated circuit die includes a microelectronic circuit having a plurality of inputs and outputs. A first set of the inputs and outputs are electrically coupled to a plurality of package-to-circuit connection regions on the package substrate. A second set of input and outputs are electrically coupled through the package substrate to package-to-circuit connection regions on the interface stratum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.