Patent · US Active

SAR analog-to-digital converter with large input range

US7773024B2 · kind B2 · utility

7Cited by
5References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 15, 2008
Grant dateAug 10, 2010
Priority date
Expiry dateJul 15, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/468
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A method for analog-to-digital conversion is provided using successive approximation and a plurality of capacitors including a first set of capacitors and a second set of capacitors, a first side of each of the plurality of capacitors being coupled to a common node. The method includes sampling an input voltage on the first set of capacitors, after the step of sampling leaving a side of at least one capacitor of the first set of capacitors floating, coupling a capacitor of the first set of capacitors, which is not floating, with a capacitor of the second set of capacitors so as to redistribute the charge on the coupled capacitors, comparing the voltage on the common node with a comparator reference voltage level to receive a comparison result to be used for a bit decision, and switching the floating side of the floating capacitor of the first set of capacitors to either a first reference voltage or a second reference voltage in accordance with the bit decision.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.