Patent · US Active

System and method for arbitration for virtual channels to prevent livelock in a richly-connected multi-processor computer system

US7773617B2 · kind B2 · utility

0Cited by
10References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 8, 2006
Grant dateAug 10, 2010
Priority date
Expiry dateJul 4, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/1652
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods for arbitrating for virtual channels to prevent livelock in richly-connected multiprocessor computer system. Livelock is prevented in a multiprocessor computer system, in which each of a large plurality processing node has input links and egress links. A virtual channel is assigned to convey the communication. Communication data from the plurality of input links is buffered in cross point buffers. A subset of the cross point buffers bids for, and arbitrates, use of the same one egress link. The virtual channel of the selected communication is identified. It is determined whether any of the other communications bidding for use of the egress link are associated with the identified virtual channel and if so whether any communication has been waiting longer than the selected communication. If so, allowing that communication to use the egress link before the selected communication does.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.