Interface/synchronization circuits for radio frequency receivers with mixing DAC architectures
US7773968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2006 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | May 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0039
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver (1300) includes a mixing digital-to-analog converter (DAC) (1306), a direct digital frequency synthesizer (DDFS) (132A) and an interface (134D). The mixing DAC (1306) includes a radio frequency (RF) transconductance section (1308) and a switching section (1310). The RE transconductance section (1308) includes an input for receiving an RF signal and an output for providing an RE current signal. The switching section (1310) is coupled to the RF transconductance section (1308) and includes inputs for receiving bits associated with a digital local oscillator (LO) signal and an output that is configured to provide an analog output signal. The DDFS (132A) includes outputs configured to provide the bits associated with the digital LO signal to the inputs of the switching section (1310). The interface (134D) is coupled to the DDFS (132A) and is configured to align the bits provided by the DDFS (132A) with a first clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.