Method to secure an electronic assembly executing any algorithm against attacks by error introduction
US7774653B2 · kind B2 · utility
0Cited by
10References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 17, 2004 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Oct 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention concerns an automatic method to secure an electronic calculation assembly against attacks by error introduction or by radiation. The following are used: 1) Static information generated by the automatic process; 2) A dynamic part of the memory of the electronic system allocated by the automatic process; 3) Beacons and check points to mark out the code, introduced by the automatic process; 4) Beacon functions storing information in the dynamic memory; 5) History verification functions using the static information and the dynamic memory to check that no errors have been introduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.