Apparatus for testing a phrase-locked loop in a boundary scan enabled device
US7774665B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2008 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Dec 4, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3016
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus for interfacing a phase locked loop in a field programmable gate array. The apparatus comprising a phase locked loop cluster. The phase locked loop further comprising a plurality of RT modules, a plurality of RO modules, at least one TY module, a plurality of receiver modules and at least one buffer module. A phase locked loop selectively coupled to the RT modules, the RO modules, the TY modules, the receiver modules and at least one buffer module in the phase locked loop cluster.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.