Thin film transistor and method of fabricating the same
US7776669B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2007 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Dec 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0251
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor includes a substrate; a semiconductor layer disposed on the substrate, and including polycrystalline silicon having a constant directivity and a uniformly distributed crystal grain boundary; a gate insulating layer; a gate electrode; an interlayer insulating layer; and source and drain electrodes. The thin film transistor is formed by preparing a substrate including a first region, a second region, and a third region; forming an amorphous silicon layer on the first region, second region, and third region of the substrate; doping a first impurity containing boron into an amorphous silicon layer of the first region; forming a crystallization inducing material on the amorphous silicon layer of the first region; applying crystallization energy to the amorphous silicon layer, and crystallizing the amorphous silicon layers of the first region and the second region adjacent to the first region to form polycrystalline silicon layers; crystallizing the amorphous silicon layer of the third region adjacent to the second region to form a polycrystalline silicon layer using a laser crystallization method; and patterning the polycrystalline silicon layers of the first regi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.