Patent · US Active

Semiconductor device interconnection contact and fabrication method

US7776739B2 · kind B2 · utility

1Cited by
5References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 9, 2005
Grant dateAug 17, 2010
Priority date—
Expiry dateJan 27, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76838
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device interconnection contact and fabrication method comprises fabricating one or more active devices on a semiconductor substrate. A diffusion barrier layer is deposited over the devices, followed by an Al-based metallization layer. The diffusion barrier and metallization layers are masked and etched to define interconnection traces. Mask and etch steps are then performed to remove interconnection trace metallization that is in close proximity to the active device regions, while leaving the traces' diffusion barrier layer intact to provide conductive paths to the devices, thereby reducing metallization-induced mechanical stress which might otherwise cause device instability.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.