Pixel interconnect insulators and methods thereof
US7777186B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Oct 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/809
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, an infrared focal plane comprises an array of pixels configured to detect optical radiation in a predetermined radiation band are positioned on a support substrate. The pixels are connected to pixel contacts on a read-out integrated circuit via pixel interconnects comprising bonding bumps. According to some embodiments, indium migration is blocked by a patterned electrical insulator comprising a plurality of intersecting walls defining a plurality of cells that surround each pixel interconnect. The patterned electrical insulator may be dimensioned such that it does not physically contact the support substrate, the array of pixels or pixel interconnects. In this manner, pixel-pair defects due to indium migration resulting from cryogenic thermal-cycling may be prevented, thereby extending the thermal-cycling lifetime of the focal plane array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.