Semiconductor device for latch-up prevention
US7777248B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Dec 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
Abstract
A semiconductor device is provided for preventing Latch-up in Silicon Controlled Rectifiers (SCRs) when these SCRs become activated. Embodiments of the invention use a natively doped region having high resistance to separate the NPN transistor from the PNP transistor that form the SCR, and/or to isolate the entire SCR from the injector source in order to prevent latch-up. The high resistance of the natively doped region allows to achieve the separation resistance needed in a smaller space, as compared to the space required to achieve the same separation resistance in a well. Accordingly, the invention provides for more robust and cost effective latch-up prevention devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.