Three dimensional integrated circuits
US7777319B2 · kind B2 · utility
23Cited by
22References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 10, 2004 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Jul 22, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor device, comprising: a first module layer having a plurality of circuit blocks; and a second module layer positioned substantially above the first module layer, including a plurality of configuration circuits; and a third module layer positioned substantially above the second module layer, including a plurality of circuit blocks; wherein, the configuration circuits in the second module control a portion of the circuit blocks in the first and third module layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.