Memory with write port configured for double pump write
US7778105B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Oct 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory with a write port configured for double-pump writes. The memory includes a first and second memory locations each having one or more bit cells, and one or more bit lines each coupled to corresponding ones of the bit cells. A write port is coupled to each of the bit lines. Selection circuitry, responsive to a first clock edge, latches first data from a first data path through the write port, and responsive to a second clock edge, latches second data from a second data path through the write port. A first pulse is generated during a first phase of the clock signal to cause writing of the first data into the first memory location. A second pulse is generated during a second phase of the clock signal to cause writing of the second data into the second memory location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.